M.Tech. Industrial Electronics 1st Semester Syllabus

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Simulation Modelling and Analysis
Subject Code : 14ELD155

IA Marks : 50
No. of Lecture Hours /week : 04 Exam Hours : 03
Total no. of Lecture Hours : 50 Exam Marks : 100

Basic simulation modeling: nature of simulation, system models, discrete event simulation, single server simulation, alternative approaches, other types of simulation.
Building valid, credible and detailed simulation models. Techniques for increasing model validity and credibility, comparing real world observations
Selecting input probability distributions. Useful probability distributions, assessing sample independence, activity I, II and III. Models of arrival process.
Random numbers generators: linear congruential, other kinds, testing random number generators. Random variate generation: approaches, continuous random variates, discrete random variates, correlated random variates.
Output data analysis. Statistical analysis for terminating simulations, analysis for steady state parameters. Comparing alternative system configurations. Confidence intervals. Variance reduction techniques. Antithetic and Control variates.

Reference Books:
1. Jerry Banks, “Discrete event system simulation”, Pearson, 2009
2. Averill Law “Simulation modeling and analysis”, MGH 4th edition, 2007
3. Seila, Ceric, Tadikamalla, “Applied simulation modeling”, Cengage, 2009.
4. George S. Fishman, “Discrete event simulation”, Springer, 2001
5. N. Viswanadham, Y. Narahari, “Performance modeling of automated manufacturing systems”, PHI, 2000
6. Frank L. Severance, “System modeling and simulation”, Wiley, 2009
7. K. S. Trivedi, “Probability and stastistics with reliability queuing and computer science applications”, PHI, 2007.

Digital Circuits and Logic Design
Subject Code : 14ELD12

IA Marks : 50
No. of Lecture Hours /week : 04 Exam Hours : 03
Total no. of Lecture Hours : 50 Exam Marks : 100

Threshold Logic: Introductory Concepts, Synthesis of Threshold Networks
Reliable Design and Fault Diagnosis Hazards: Fault Detection in Combinational Circuits, Fault-Location Experiments, Boolean Differences, Fault Detection by Path Sensitizing, Detection of Multiple Faults, Failure-Tolerant Design, Quadded Logic
Capabilities, Minimization, and Transformation of Sequential Machines: The Finite- State Model, Further Definitions, Capabilities and Limitations of Finite – State Machines, State Equivalence and Machine Minimization, Simplification of Incompletely Specified Machines.
Structure of Sequential Machines: Introductory Example, State Assignments Using Partitions, The Lattice of closed Partitions, Reductions of the Output Dependency, Input Independence and Autonomous Clocks, Covers and Generation of closed Partitions by state splitting, Information
Flow in Sequential Machines, ELDompositions, Synthesis of Multiple Machines.
State—Identifications and Fault-Detection Experiments: Homing Experiments, Distinguishing Experiments, Machine Identification, Fault-
Detection Experiments, Design of Diagnosable Machines, Second Algorithm for the Design of Fault Detection Experiments, Fault-Detection
Experiments for Machines which have no Distinguishing Sequences.

Reference Books:
1. Zvi Kohavi, “Switching and Finite Automata Theory”, 2nd Edition. Tata McGraw Hill Edition
2. Charles Roth Jr., “Digital Circuits and logic Design”,
3. Parag K Lala, “Fault Tolerant And Fault Testable Hardware Design”, Prentice Hall Inc. 1985
4. E. V. Krishnamurthy, “Introductory Theory of Computer”, Macmillan Press Ltd, 1983
5. Mishra & Chandrasekaran, “Theory of computer science – Automata, Languages and Computation”, 2nd Edition, PHI,2004

Advanced Embedded Systems
Subject Code : 14EIE13

IA Marks : 50
No. of Lecture Hours /week : 04 Exam Hours : 03
Total no. of Lecture Hours : 50 Exam Marks : 100

Typical Embedded System: Core of the Embedded System, Memory, Sensors and Actuators, Communication Interface, Embedded Firmware, Other System Components Characteristics and Quality Attributes of Embedded Systems
Hardware Software Co-Design and Program Modeling: Fundamental Issues in Hardware Software Co-Design, Computational Models in Embedded Design, Introduction to Unified Modeling Language, Hardware Software Trade-offs
Embedded Firmware Design and Development: Embedded Firmware Design Approaches, Embedded Firmware Development Languages Real-Time Operating System (RTOS) based Embedded System Design.
Operating System Basics, Types of OS, Tasks, Process and Threads, Multiprocessing and Multitasking, Task Scheduling, Threads, Processes
and Scheduling: Putting them altogether, Task Communication, Task Synchronization, Device Drivers, How to Choose an RTOS
The Embedded System Development Environment: The Integrated Development Environment (IDE), Types of Files Generated on Crosscompilation,
Disassembler/Decompiler, Simulators, Emulators and Debugging, Target Hardware Debugging, Boundary Scan.
Trends in the Embedded Industry : Processor Trends in Embedded System, Embedded OS Trends, Development Language Trends, Open
Standards, Frameworks and Alliances, Bottlenecks.

Reference Books:
1. K.V.Shibu, “Introduction to Embedded Systems”, Tata McGraw Hill Education Private Limited, 2009
2. James K.Peckol, “Embedded Systems – A contemporary Design Tool”, John Weily, 2008.

Advanced Control Systems
Subject Code : 14EIE14

IA Marks : 50
No. of Lecture Hours /week : 04 Exam Hours : 03
Total no. of Lecture Hours : 50 Exam Marks : 100

Digital Control Systems: Review of difference equations and Z — transforms, Z- transfer function (Pulse transfer function), Z.-. Transforms
analysis sampled data systems, Stability analysis (Jury’s Stability Test and Bilinear Transformation), Pulse transfer functions and different
configurations for closed loop Discrete-time control systems
Modern Control Theory: I, State model for continuous time and discrete time systems, Solutions of state equations (for both continuous and
discrete systems), Concepts of controllability and observability (For both continuous and discrete systems), Pole Placement by state feedback
(for both continuous and discrete systems), Full order and reduced order observes (for both continuous and discrete systems), Dead beat control
by state feedback, Optimal control problems using state variable approach, State Regulator and output regulator, Concepts of Model reference
control systems, Adaptive Control systems and design
Non Linear Control Systems: Common nonlinearities, Singular Points, Stability of nonlinear systems – Phase plane analysis and describing
function analysis, Liapunoy’s stability criterion, Popov’s criterion

Reference Books:
1. K.Ogata, “Modern Control Engineering”, PHI
2. K.Ogata,“Discrete Time Control Systems”, Pearson Education
3. Nagarath and Gopal, “Control Systems Engineering”, Wiley Eastern Ltd
4. M. Gopal, “Modem Control System Theory”; Wiley Eastern Ltd.
5. M. Gopal, “Digital Control & State Variable Methods”, TMH, 2003

Digital System Design Using Verilog
Subject Code : 14 ELD151

IA Marks : 50
No. of Lecture Hours /week : 04 Exam Hours : 03
Total no. of Lecture Hours : 50 Exam Marks : 100

Introduction and Methodology: Digital Systems and Embedded Systems, Binary representation and Circuit Elements, Real-World Circuits, Models, Design Methodology.
Combinational Basics: Boolean Functions and Boolean Algebra, Binary Coding, Combinational
Components and Circuits, Verification of Combinational Circuits.
Number Basics: Unsigned and Signed Integers, Fixed and Floating-point Numbers.
Sequential Basics: Storage elements, Counters, Sequential Datapaths and Control, Clocked Synchronous Timing Methodology.
Memories: Concepts, Memory Types, Error Detection and Correction.
Implementation Fabrics: ICs, PLDs, Packaging and Circuit Boards, Interconnection and Signal Integrity.
Processor Basics: Embedded Computer Organization, Instruction and Data, Interfacing with memory.
I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O software.
Accelerators: Concepts, case study, Verification of accelerators.
Design Methodology: Design flow, Design optimization, Design for test.

1. Peter J. Ashenden, “Digital Design: An Embedded Ssytems Approach UsingVERILOG”, Elesvier, 2010.

Probability and Random Process
Subject Code : 14EIE152

IA Marks : 50
No. of Lecture Hours / Week : 04 Exam. Hours : 03
Total No. of Lecture Hours : 50 Exam. Marks : 100

Introduction to probability theory: Experiments, Sample space, Events, Axioms, Assigning probabilities, Joint and conditional, Baye’s theorem, Independence, Discrete random variables, Engineering example
Random variables, Distributions, Density functions: CDF, PDF, Gaussian random variable, Uniform, Exponential, Laplace, Gamma, Erlang, Chi-square, Rayleigh, Rician and Cauchy types of random variables.
Operation on a single random variable: Expected value, EV of random variables, EV of functions of random variables, Central moments, Conditional expected values.
Characteristics functions: Probability generating functions, Moment generating function, Engineering applications, Scalar quantization, Entropy and source coding.
Pairs of random variables: Joint PDF, Joint probability mass functions, Conditional distribution, Density and mass functions, EV involving pairs of random variables, Independent random variables, Complex random variables, Engineering application.
Multiple random variables: Joint and conditional PMF, CDF, PDF, EV involving multiple random variables, Gaussian random variable in multiple dimension, Engineering application, Linear prediction.
Random process: Definition and characterisation, Mathematical tools for studying random processes, Stationery and Ergodic random processes, Properties of ACF.
Example Processes: Markov processes, Gaussian processes, Poisson processes, Engineering application, Computer networks, Telephone networks.

Reference books:
1. S.L.Miller and D.C.Childers, “Probability and random processes: application to signal processing and communication”, Academic press/Elsevier 2004.
2. A.Papoullis and S.U.Pillai, “Probability, random variables and stochastic processes”, McGraw Hill 2002
3. Peyton Z. Peebles, “Probability, Random variables and random signal principles”, TMH, 4th edition, 2007.
4. H Stark and Woods, “Probability, random processes and application”, PHI, 2001.

Subject Code : 14ELD153

IA Marks : 50
No. of Lecture Hours /week : 04 Exam Hours : 03
Total no. of Lecture Hours : 50 Exam Marks : 100

Introduction: Overview of nanoscience and engineering. Development milestones in micro fabrication and electronic industry, Moores law and continued miniaturization, Classification of Nanostructures, Electronic properties of atoms and solids: Isolated atom, Bonding between atoms, Giant molecular solids, Free electron models and energy bands, crystalline solids, Periodicity of crystal lattices, Electronic conduction, effects of nanometer length scale, Fabrication methods: Top down processes, Bottom up processes methods for templating the growth of nanomaterials, ordering of nanosystems.
Characterization: Classification, Microscopic techniques, Field ion microscopy, scanning probe techniques, diffraction techniques: bulk ,surface, spectroscopy techniques: photon, radiofrequency, electron, surface analysis and dept profiling: electron, mass, Ion beam, Reflectrometry, Techniques for property measurement: mechanical, electron, magnetic, thermal properties.
Inorganic semiconductor nanostructures: overview of semiconductor physics, Quantum confinement in semiconductor nanostructures:
quantum wells,quantum wires, quantum dots, superlattices, band offsets, electronic density of states.
Fabrication techniques: requirements of ideal semiconductor, epitaxial growth of quantum wells, lithography and etching, cleaved edge
overgrowth, growth of vicinal substrates, strain induced dots and wires, electrostatically induced dots and wires, Quantum well width
fluctuations, thermally annealed quantum wells, semiconductor nanocrystals, collidal quantum dots, self-assembly techniques.
Physical processes: modulation doping, quantum hall effect, resonant tunneling, charging effects, ballistic carrier transport, Inter band
absorption, intraband absorption, Light emission processes, phonon bottleneck, quantum confined stark effect, nonlinear effects, coherence and
dephasing, characterization of semiconductor nanostructures: optical electrical and structural.
Methods of measuring properties-structure: atomic, crystallography, microscopy, spectroscopy. Properties of nanoparticles: metal nano
clusters, semiconducting nanoparticles, rare gas and molecular clusters, methods of synthesis(RF, chemical, thermolysis, pulsed laser methods)
Carbon nanostructures and its applications(field emission and shielding, computers, fuel cells, sensors, catalysis).Self assembling nanostructured
molecular materials and devices: building blocks, principles of self assembly, methods to prepare and pattern nanoparticles, templated
nanostructures, liquid crystal mesophases. Nanomagnetic materials and devices: magnetism, materials, magneto resistance, nanomagnetism in
technology, challenges facing nanomagnetism.
Applications: Injection lasers, quantum cascade lasers, singe photon sources, biological tagging, optical memories, coulomb blocade devices,
photonic structures, QWIP’s, NEMS,MEMS.

1. Ed Robert Kelsall,Ian Hamley,Mark Geoghegan, “ Nanoscale science and technology” ,John wiley and sons,2007.
2. Charles P Poole,Jr,Frank J owens “Introduction to Nanotechnology” ,John wiley,copyright 2006,Reprint 2011.
3. Ed William A Goddard III,Donald W Brenner,Sergey Edward Lyshevski,Gerald J Lafrate, “ Hand Book of Nanoscience Engineering and Technology” ,CRC press,2003

Subject Code : 14ECS154

IA Marks : 50
No. of Lecture Hours / Week : 04 Exam. Hours : 03
Total No. of Lecture Hours : 50 Exam. Marks : 100

MOS transistor theory: NMOS/PMOS transistor, Threshold voltage equation, Body effect, MOS device design equation, Sub threshold region, Chanel length modulation, Mobility variations, tunnelling, Punch through, Hot electron effect MOS models, Small signal AC characteristic, CMOS inverters, An/Ap ratio, noise margin, Static load MOS inverters, Differential inverter, Transmission gate, Tristate inverter, BiCMOS inverter.
CMOS process Technology: Lambda based design rules, Scaling factor, Semiconductor technology overview, Basic CMOS technology, p-well/
n-well/ twin-well process. Current CMOS enhancement (oxide isolation, LDD, refractory gate, Multilayer interconnect), Circuit element,
resistor, Capacitor, Interconnects, Sheet resistance and standard unit capacitance concept delay unit time, Inverter delays driving capacitive
loads, Propagate delays, MOS mask layer, Stick diagram, design rules and layout, Symbolic diagrams, MOS feints, Scaling of MOS circuits..
Basic of Digital CMOS design: Combinational MOS logic circuits -Introduction, CMOS logic circuits with the a MOS load, CMOS logic
circuits, Complex logic circuits, transmission gate, Sequential MOS logic circuits – Introduction, Behaviour of high stable elements, SR latch
circuits, Clocked latch and flip-flop circuits, CMOS D-latch and triggered flip-flop, Dynamic logic circuits – Introduction, principles of pass
transistor circuits, Voltage bootstrapping synchronous dynamic circuit techniques, Dynamic CMOS circuit techniques.
CMOS analog design: Introduction, Single amplifier, Differential amplifier, Current mirrors, Bandgap references, Basis of cross operational
Dynamic CMOS and clocking: Introduction, Advantages of CMOS over NMOS, CMOS/SOS technology, CMOS/bulk technology, Latchup in
bulk CMOS, Static CMOS design, Domino CMOS structure and design, Charge sharing, Clocking – Clock generation, Clock distribution,
Clocked storage elements.

Reference books:
1. Neil Weste and K. Eshraghian, “Principles of CMOS VLSI design: A system perspective”, Pearson education (Asia) Pvt. Ltd. 2nd edition, 2000.
2. Wayne Wolf, “Modern VLSI design: System on Silicon”, Pearson education, 2nd edition.
3. Douglas A. Pucknell and Kamram Eshraghian, “Basic VLSI design”, PHI, 3rd edition, (original edition – 1994).
4. Sung Mo Kang and Yosuf Lederabic Law, “CMOS digital integrated circuits: Analysis and design”, McGraw Hill, 3rd edition.

Advanced Mathematics
Subject Code : 14ELD11

IA Marks : 50
No. of Lecture Hours / Week : 04 Exam. Hours : 03
Total No. of Lecture Hours : 50 Exam. Marks : 100

Matrix Theory
QR EI Decomposition – Eigen values using shifted QR algorithm- Singular Value EI Decomposition – Pseudo inverse- Least square approximations
Calculus of Variations
Concept of Functionals- Euler’s equation – functional dependent on first and higher order derivatives – Functionals on several dependent
variables – Isoperimetric problems- Variational problems with moving boundaries
Transform Methods
Laplace transform methods for one dimensional wave equation – Displacements in a string – Longitudinal vibration of a elastic bar – Fourier transform methods for one dimensional heat conduction problems in infinite and semi infinite rod.
Elliptic Equation
Laplace equation – Properties of harmonic functions – Fourier transform methods for laplace equations. Solution for Poisson equation by Fourier transforms method
Linear and Non Linear Programming
Simplex Algorithm- Two Phase and Big M techniques – Duality theory- Dual Simplex method. Non Linear Programming –Constrained extremal
problems- Lagranges multiplier method- Kuhn- Tucker conditions and solutions

Reference Books:
1. Richard Bronson,”Schaum’s Outlines of Theory and Problems of Matrix Operations”, McGraw-Hill, 1988.
2. M. K.Venkataraman,”Higher Engineering Mathematics”, National Pub. Co, 1992.
3. L.Elsgolts, “Differential Equations and Calculus of Variations”, Mir, 1977.
4. I.N. Sneddon,”Elements of Partial differential equations”, Dover Publications, 2006.
5. K. Sankara Rao,”Introduction to partial differential equations”, Prentice – Hall of India, 1995
6. H.A.Taha, “Operations research – An introduction”, McMilan Publishing co, 1982.

Advanced Embedded System Lab
Subject Code : 14EIE16

IA Marks : 25
No. of Lecture Hours /week : 03 Exam Hours : 03
Total no. of Lecture Hours : 42 Exam Marks : 50

· Use the EDA (Electronic Design Automation) tools to learn the Embedded Hardware Design and for PCB design.
· Familiarize the different entities for the circuit diagram design.
· Familiarize with the layout design tool, building blocks, component placement, routings, design rule checking etc.
Embedded Programming Concepts (RTOS):
1.Create ‘n’ number of child threads. Each thread prints the message “ I’m in thread number …” and sleeps for 50 ms and then quits. The main thread waits for complete execution of all the child threads and then quits. Compile and execute in Linux.
2.Implement the multithread application satisfying the following :
a. Two child threads are crated with normal priority.
b. Thread 1 receives and prints its priority and sleeps for 50ms and then quits.
c. Thread 2 prints the priority of the thread 1 and rises its priority to above normal and retrieves the new priority of thread 1, prints it and then quits.
d. The main thread waits for the child thread to complete its job and quits.
3.Implement the usage of anonymous pipe with 512 bytes for data sharing between parent and child processes using handle inheritance mechanism.
4.Test the program below using multithread applicationa.
The main thread creates a child thread with default stack size and name ‘Child_Thread’.
b. The main thread sends user defined messages and the message ‘WM_QUIT’ randomly to the child thread.
c. The child thread processes the message posted by the main thread and quits when it receives the ‘WM_QUIT’ messge.
d. The main thread checks the termination of the child thread and quits when the child thread complete its execution.
e. The main thread continues sending the random messages to the child thread till the ‘WM_QUIT’ message is sent to child thread.
f. The messaging mechanism between the main thread and child thread is synchronous.
5.Test the program application for creating an anonymous pipe with 512 bytes of size and pass the ‘Read Handle’ of the pipe to a second process using memory mapped object. The first process writes a message ‘ Hi from Pipe Server’. The 2nd process reads the data written by the pipe server to the pipe and displays it on the console. Use event object for indicating the availability of data on the pipe and mutex objects for synchronizing the access in the pipe.
6.Create a POSIX based message queue for communicating between two tasks as per the requirements given below:-
a. Use a named message queue with name ‘MyQueue’.
b. Create two tasks(Task1 & Task2) with stack size 4000 & priorities 99 & 100 respectively.
c. Task 1 creates the specified message queue as Read Write and reads the message present, if any, from the message queue and prints it on the console.
d. Task2 open the message queue and posts the message ‘Hi from Task2’.
e. Handle all possible error scenarios appropriately.

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